The bare bone debug program is ready.
Here is how the program looks like. Things will improve as other developers add stuff to the debug infrastructure like packet count, expansion boards ID etc.
There are two bugs which I couldn't fix even after hours of attempt:
Tomorrow I am planning to go back to the real stuff I am working on. Tomorrow I will try to add another encoder. Let's see if it is possible. If not, atleast we will know that this solution is not possible for available fpga resource.
Till then I am going to sleep.
Here is how the program looks like. Things will improve as other developers add stuff to the debug infrastructure like packet count, expansion boards ID etc.
There are two bugs which I couldn't fix even after hours of attempt:
- UART is suddenly send incorrect data causing wrong output for a moment.
- HDMI 1 is shown connected even though only one is connected.
Tomorrow I am planning to go back to the real stuff I am working on. Tomorrow I will try to add another encoder. Let's see if it is possible. If not, atleast we will know that this solution is not possible for available fpga resource.
Till then I am going to sleep.
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