Tuesday 3 June 2014

UART Documentation

Atlys board has a UART-USB bridge which can be used for UART communication with other devices. UART is useful as a debug so I have made a simple UART.

Features:
1.Variable Data Bits: 7, 8, or 9 data bits and 1 or 2 stop bits
2.Parity generation and checking: odd, even, or none.
3.One transmit and one receive data buffer.
4.Received data and status can optionally be read from a single register
5.Built-in Baud Rate Generator.
6.Variable Baudrates. Use case: 19,200
7. Data is received in frame.

Architecture
UART Transmitter
 It has 3 major components:
1.FIFO Buffer
2.Baudrate Generator
3.Transmitter interface circuit

UART Receiver:
 It has 3 major components:
1.Baudrate Generator
2.Receiver interface circuit
3.FIFO Buffer 

Primary Inputs/Outputs
Inputs
1.clk,reset
2.WIRE[7:0] W_DATA - DATA INPUT TO TRANSMITTER FIFO
3.WIRE Wr_UART- WHEN SET TO HIGH W_DATA IS WRITTEN INTO TRANSMITTER FIFO 
4.WIRE Rx - UART RECIEVER LINE
5.WIRE RD_UART- READS  THE DATA FROMP FIFO
Outputs
1.WIRE TX_FULL- HIGH WHEN TX FIFO IS FULL
2.WIRE TX- UART TRANSMITTER LINE
3.WIRE RX_EMPTY- HIGH WHEN RX FIFO IS EMPTY
4.WIRE R_DATA- OUPUT FROM RX FIFO

FSM for Reciever


As the communication is asynchronous, data is oversampled. Each bit is oversampled 16 times. Oversampling is done using a mod m counter.
As the circuit is oversampling, I am running UART at 50 MHz which is generated using PLL.

How To Use?

  • Add UART files to your design file.
  • Add UART_clock.xco. You may have to regenerate the core depending on you design.
  • Set paramerters of UART_main.(The following are default parameters)
    • Data_Bits=8                  // No. of data bits
    • StopBit_ticks = 16        // No. of ticks for stop bits. 16/24/32 for 1/1.5/2 bits
    • DIVSIOR = 326           // Use it to set baud rate. Divisor= 50/(16*BaudRate)
    • DVSR_BIT=9              // No. of bits of Divisor
    • FIFO_Add_Bit= 2        // No. of address bits of FIFO
  • To transmit data, drive w_data and strobe the wr_uart signal.
    • Data will not be written into fifo if tx_full is high
  • To dequeue data from receiver fifo, strobe the rd_uart signal. 
    • Data in receiver is invalid if rx_empty is high
  • Add the following lines to your ucf file.
  • Download exar driver from here and install them. 
    • NOTE: Turns out that the linux drivers are outdated. Shenki has made changes to it which can be found here but I was unable to get it running. I have test the code on windows.
  • Use hyperterminal or gtkterm to monitor/send data.
  • Enjoy!
  •  
    You can get uart files from UART folder in this link:

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