-Studied ug416 and ug388 to understand XILINX MIG
-Studied working of DDR2 Ram
-Ran example design to understand the working further. Took me lot of time to get the clocks working at correct rate as PLL values were changed manually which I didn't take notice of.
The read FSM of DDR2 looks something like this^. So 1 burst read gives 64 bytes. Jpeg encoder needs 1280*8*3 bytes to start. That means it takes a lot of cycle to fill the jpeg. I will try under clocking the DDR2 ram today and see whether it affects the frame rate.
Also I will start coding the test bench.
-Studied working of DDR2 Ram
-Ran example design to understand the working further. Took me lot of time to get the clocks working at correct rate as PLL values were changed manually which I didn't take notice of.
The read FSM of DDR2 looks something like this^. So 1 burst read gives 64 bytes. Jpeg encoder needs 1280*8*3 bytes to start. That means it takes a lot of cycle to fill the jpeg. I will try under clocking the DDR2 ram today and see whether it affects the frame rate.
Also I will start coding the test bench.
No comments:
Post a Comment